SW Engineer Student – Validation and Verification (Software QA)

Job Description

As a V&V engineer you will support the HW/SW department in R&D with various tasks.

All developed products need to be verified and checked before proceeding and transferring it to production. This process is owned and performed by the V&V engineer with respect to the design plan and specification of the product.

Capacity

The capacity should be around 60% (3 days a week), where the student will work in NANOMOTION facility alongside with the HW/SW R&D Group.

Job requirements

  • SW engineer degree (3rd of 4th year)
  • Debug and troubleshoot orientation
  • Debug and troubleshoot orientation
  • Knowledge in test equipment (scope, DVM P.S etc.)
  • Writing ATP, Bring-Up Plans, and any needed technical documentation (English)
  • Understand the products from user perspective (via product manual)
  • Knowledge/experience in V&V tests – advantage
  • Knowledge/experience in writing small application (GUI) – advantage

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